Verification IP
test and verify SoC's protocols and interface buses.
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Product
Three Phase Closed I-P Link Energy Meter Test Bench Type KP-S3000-B
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Bofa Instrument & Equipment Co., Ltd
Three phase closed I-P link energy meter test bench, type KP-S3000-B, is designed for testing three-phase energy meters, especially for testing Closed I-P Links three-phase energy meters. It is an ideal testing equipment for energy meter factory or R&D institute. All the testing procedures can be automatically operated by PC or by Keyboard manually.
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Communication Network Lab (5G, 4G, 3G, 2G, IP, TDM)
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GL’s End-to-End Wireless Network Simulation Test Suite provides you an advanced full-fledged “Live Network” at your company premises in any customized package to suit test requirements.
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Product
IP Module with 2 CAN Ports
IP-CAN
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The IP Module driver can be instantiated multiple times to control multiple cards by the same CPU. IP-CAN when coupled with the Dynamic Driver "knows" what slot it is in and which carrier it is installed into. The slot and carrier information is required when using multiple cards in a PCI/PCIe system with dynamic address assignment.
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Product
HBM Verification Tester
HBM-VT
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High Power Pulse Instruments GmbH
- HBM pulse generator verification tester according ANSI/ESDA/JEDEC JS-001 up to ±10kV- To be used in HBM test and qualification labs for regular pulse generator specification compliance test in order to fulfill lab audit and certification requirements- Fully automatic compliance test and verification of HBM pulse generators regarding ANSI/ESDA/JEDEC JS-001 normative standard at 3 different load conditions: Short Circuit, 500 Ω, and a reference diode at VBR=15 V reverse breakdown voltage, including DC test- Parameter evaluation and verification of the transient HBM current waveforms: Peak Current, Rise Time, Decay Time, Maximum Ringing Current- Optionally available upgrade for all HPPI TLP-3010C, 4010C, 8010A, 8010C, HBM-TS10-A hardware systems in combination with HBM-S1-B (6kV) pulse generators (upgrade on request)- Fully automatic test report generation (PDF)- Electrically floating (no fixed system ground): The HBM loads, current sensor output, USB control interface and the enclosure are electrically floating. There is no limiting system ground which may introduce common-mode interference induced HBM current measurement errors.- Isolated industrial full-speed USB control interface- Isolated power supply derived from USB port- Compact size 126mm x 82.5mm x 44.5mm
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Product
PCIe End Point IP Core
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The Arasan PCI Express End Point is a high-speed, high-performance, and low-power IP core that is fully compliant to the PCI Express Specification 1.1 and 2.0. The IP core is designed for applications in computing, networking, storage, servers, wireless, and consumer electronics. The feature-rich IP core is highly configurable that allows a target design to be implemented with the least number of gates and highest performance.
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Product
IP to Dual RS-232 Controller
VSA-31-IP
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The VSA-31-IP is an add-on module for the Switch-Cat A/V Systems. The new IP module allows monitoring and control of one to multiple Switch-Cat installations via IP across the customers internal network.
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Product
IP Core and FPGA Products
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Our FPGA offerings include development boards and IP cores for Altera FPGA devices. The IP cores include: I2C, PCIe, JPEG-LS, LVDS Camera Link and memory controllers.
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RF Over IP
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Quintech Electronics and Communications Inc.
Digital IF / RF Over IP Solutions.
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Product
PCI card with 3 IP sites
PCI3IP
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The PCI compatible PCI3IP design adds 3 Industrypack compatible slots to your PCI host. The PCI3IP acts as an adapter, converter, carrier, or bridge between the PCI bus and your IndustryPack hardware. The PCI3IP is a half size PCI card with 3 IP sites; compatible with the smallest chassis and the tallest processors that prevent full size solutions.
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Product
Fixed Point FFT/IFFT IP Core
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Abaco Systems' fixed point FFT cores are the most efficient and fastest available in the FPGA world. With a revolutionary architecture for efficient memory usage and balanced use of arithmetic and logic resources, we offer complete FFT solutions with any input resolution up to 2Gsps. Whether you require a forward FFT, Inverse FFT, a 2D FFT, correlation or any algorithm efficiently performed with a Fourier transform, our technology will offer you the best solution for a cost-effective implementation.
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I/P Electro-Pneumatic Signal Converters
TEIP11 / TEIP11-PS
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Electro-pneumatic signal converters are the link between the control rooms and pneumatic actuators. I/P converters are available with and without booster stage.
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Product
Standalone IP To ASI Converter
DTE-3100
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DekTec's standalone power-over-ethernet enabled IP to ASI Converter, allowing zero-jitter transmission of Transport Streams coming from IP networks.
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Product
Static Design Verification
ALINT-PRO
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ALINT-PRO™ is a design verification solution for RTL code written in VHDL, Verilog, and SystemVerilog, which is focused on verifying coding style and naming conventions, RTL and post-synthesis simulation mismatches, smooth and optimal synthesis, correct FSM descriptions, avoiding problems on further design stages, clocks and reset tree issues, CDC, RDC, DFT, and coding for portability and reuse. The solution performs static analysis based on RTL and SDC™ source files uncovering critical design issues early in the design cycle, which in turn reduces design signoff time dramatically. Running ALINT-PRO before the RTL simulation and logic synthesis phases prevents design issues spreading into the downstream stages of design flow and reduces the number of iterations required to finish the design.
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Specialized Extender Card Testing IP Modules
IP-Debug-Bus
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IP-Debug-Bus is a specialized extender card which is optimized for testing IP Modules. The bus signals are all accessible via test points. The testpoints include multiple ground locations and .025 sq. posts for ease of connection to your logic analyzer or scope. The testpoints are labeled for easy identification
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End Point IP Core
PCIe
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The highly configurable PCIe End point IP core supports x1, x2, and x4 lane with a selection of 32/64-bit data path. Depending on design requirements, a maximum of 8 VCs and 8 TCs are supported. The IP core consists of many useful features that can be included to enhance system performance and to address special design needs in different applications. The data link layer allows the configuration of infinite credits to boost the flow control efficiency. By-pass mode, cut-through mode, and store-and-forward mode are other optional items. The transport layer features include configurable ECRC generation and checking, support for up to 64 configurable outstanding non-posted requests, and configurable payload size from 128 to 4 Kbytes
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Hybrid Verification Platform
HES-DVM
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HES-DVM™ is a fully automated and scalable hybrid verification environment for SoC and ASIC designs. Utilizing the latest co-emulation standards like SCE-MI or TLM and newest FPGA technology, hardware and software design teams obtain early access to the hardware prototype of the design. Working concurrently with one another they develop and verify high-level code with RTL accuracy and speed-effective SoC emulation or prototyping models reducing test time and a risk of silicon re-spins.
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Product
Arasan PHY IP
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Arasan PHY’s are readily available and in production with multiple foundries from 16nm to 180nm. Our PHY’s are designed for low power on the most advanced nodes for the mobile market while also targeting the automobile market on specialized nodes where extreme temperature tolerance is required.
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Product
IP Pulse
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IP Compatible card with 4 programmable pulse generators. TTL or RS422 / RS485 compatible outputs. Programmable pulse - nS to seconds. Programmable count or free
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Product
Phase Verification Bridges
5002
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Clarke-Hess Communications Research
The Model 5002 Phase Verification Bridge set comprises passive devices that are used in conjunction with Model 5500-2 Phase Standard and an output null indicator such as a true rms voltmeter, an oscilloscope or a wave analyzer to verify that the Phase Standard is continuing to operate within its specified phase accuracy limits.
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Product
Develop - Simulate - Validate JTAG / IJTAG based IP
NEBULA
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You, your vendors and your customers being able to use one common interface to control and observe on-chip IP, resources and instruments. The figure below shows an example IC. The new IEEE 1149.1-2013 standard supports an init-data register for configuring the analog paramaters of I/O as well as controlling on-chip PLLs. The standard further extends this by defining in BSDL user test data registers or 'scan chains'. These registers enable the ability of generic software to control and observe mission mode IP and instruments simply by describing the register interface in BSDL.
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Product
MCB Thermal Verification Test Bench
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The test system is a special version of the thermal test test system in the sense that the test jig is primarily designed to hold and connect multi pole MCBs for thermal verification so that each pole can be verified to trip within the IEC time band after the MCB has been riveted. This test ensures the trip verification of MCB so as to trip all the 4 poles at once when overload is detected in one single pole. In short, this is a verification-only bench.
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Product
3U OpenVPX IP Router with 10GbE and 40GbE
ComEth4582a
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The 4582a implements a new generation of multi-layer Ethernet matrices for high speed embedded interconnect applications requiring low-power 10GbE and 40GbE connectivity. Designed in alignment with the SOSA™ standard.
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8x8 HDMI Matrix Switch with RS232 and IP Control
HSM-I-08-08
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The HSM-I-08-08 is a powerful 8x8 HDMI matrix switch with RS232 and IP control (internal web-server and Telnet). The unit supports HDCP, deep color, multi-channel digital audio (up to 7.1 channels), and may be used with any combination of DVI (PC) or HDMI (HDTV) sources and displays.
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Product
EBIRST 50-pin D-type Verification Fixture
93-005-101
Verification Fixture
The 93-005-101 50-pin D-type Verification Fixture is an accessory for the eBIRST range of USB controlled test tools capable of performing automated path resistance tests on Pickering Interfaces switching solutions. Each tool simply interfaces with the switching system's connector so a test can be run using the supplied Windows-based software.
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Matrix Code Verification Systems
REA MLV-2D
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The REA MLV-2D is a matrix- and barcode verifier which has been developed in conformance to international standards. The measurement uses defined angeles distance and illuminations to achieve repeatable results and quality information.
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Product
SoC Verification
TrekSoC
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TrekSoC automatically generates self-verifying C test cases to run on the embedded processors in SoCs. This verifies your chips more quickly and more thoroughly than an external testbench, hand-written C tests, or running only production code on the processors. TrekSoC's generated test cases target all aspects of full-SoC verification and work in a variety of different environments.
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Product
SoC Signoff & Structural Verification
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Defacto’s STAR augments existing RTL verification flows by providing fully automated structural checks. Users can also define and build their custom checks.
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Product
Verification Of Maximum Withdrawal Force Test Apparatus
IEC60884 FIG 18
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Shenzhen Chuangxin Instruments Co., Ltd.
IEC60884 FIG 18 verification of maximum withdrawal force test apparatusThis device complies with the requirements of GB 189.1-2008 Figure 18/19, IEC884 Figure 18/19, VDE0620, etc. It is suitable for checking the maximum force required to pull the plug out of the socket and the single pole pin pulled out from the socket assembly. Whether the minimum force required is within the range specified by
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Product
ATSC 3.0 Broadcast Stream Verification
StreamScope XM Verifier
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The Windows®-based Verifier web app receives, tests, and records ATSC 3.0 broadcast streams from RF, Ethernet, and file inputs. With Verifier, you can monitor real-time graphs and charts of bitrates, signaling tables, RF parameters, packet errors, subframes, PLPs, and other KPIs.
