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Verification IP
test and verify SoC's protocols and interface buses.
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Field Ttesters
Our product range comprises from small handheld, battery fed testers to full featured service performance assurance tools and distributed monitoring systems. We have several product lines including:QoS / SLA verification system Ethernet, IP, Critical Data, VoIP, IPTV .Hand-held testers: Gigabit Ethernet, Synchronous Ethernet, E1, PDH, SDH, Ethernet, IP, Jitter, Wander, Datacom, Frame Relay, etc.
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MIPI Soundwire Total IP Solutions
Soundwire
Soundwire is suited for small, cost-sensitive audio peripherals such as modern digital class-D amplifiers and digital microphones. The Total MIPI SoundWire IP Solution from Arasan enables early adopters the fastest path to adoption of this new standard by offering a comprehensive IP package that includes the Verilog RTL source code for Master and Slave, fully validated for compliance with the standard, a comprehensive test environment with a compliance suite for verification of the IP package, a SoundWire Hardware Development Kit (“HDK”) for FPGA prototyping, a SoundWire protocol analyzer and a complete SoundWire software stack.
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Emulation Platform
Veloce
The Veloce® Emulation Platform dramatically reduces risk in the verification of today’s complex SoCs and is a core technology in the Mentor Enterprise Verification Platform™ (EVP). Mentor’s software and application solutions and continual enhancements enable a comprehensive verification environment for IP, chip, and system level verification.
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Verification IPs
*AMBA AXI (AXI3, AXI4, Stream)*Open Core Protocol (OCP)*Advanced Peripheral Bus (APB)*Advanced High-performance Bus (AHB)
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3D Verification Station
Omron’s 3D verification systems provide high-quality imagery to ensure the best results in post-solder inspection.
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1mm Verification Kit
85059V
The Keysight 85059V is a 1.0 mm verification kit designed for vector network analyzer systems operating over the frequency range of DC to 120 GHz. This includes a set of standards with known characteristics, traceable to primary standards in the Keysight Technologies calibration lab. This verification kit is used to verify the measurement calibration and also to verify that the PNA/PNA-X based millimeter-wave system is operating within its specifications. The 85059V with 85059B 1 mm calibration kit are replacements for the 85059A 1 mm calibration/verification kit.
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Phase Verification Bridges
5002
Clarke-Hess Communications Research
The Model 5002 Phase Verification Bridge set comprises passive devices that are used in conjunction with Model 5500-2 Phase Standard and an output null indicator such as a true rms voltmeter, an oscilloscope or a wave analyzer to verify that the Phase Standard is continuing to operate within its specified phase accuracy limits.
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IP Pulse
IP Compatible card with 4 programmable pulse generators. TTL or RS422 / RS485 compatible outputs. Programmable pulse - nS to seconds. Programmable count or free
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Content Verification System
Pulsar
Pulsar is an automated content verification system for stored media files. It is designed for use by Broadcasters, Service Providers, Content Creators and Optical Media replicators allowing them to analyze the content before it is put live or stamped on the optical media. The software performs conformance and quality analysis on the streams provided. It allows definition of a range of user-defined checks to be performed as part of the Analysis.
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IP Module
IP-429
ARINC 429 is a versatile standardized bus interface. ARINC 429 is robust featuring Manchester encoding and enough voltage swing to provide excellent noise immunity and reasonable throughput rates. ARINC 429 is the interface of choice for critical applications; for example aircraft instrumentation and control.
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PCI Express IP
Rambus silicon-proven, high-performance PCI Express® (PCIe®) 6.0, 5.0, 4.0 and earlier generation digital controllers are optimized for use in SoCs, ASICs and FPGAs. These market-leading solutions for high-performance interfaces address AI/ML, data center and edge applications.
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SoC Verification
TrekSoC
TrekSoC automatically generates self-verifying C test cases to run on the embedded processors in SoCs. This verifies your chips more quickly and more thoroughly than an external testbench, hand-written C tests, or running only production code on the processors. TrekSoC's generated test cases target all aspects of full-SoC verification and work in a variety of different environments.
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Functional Verification Platform
Riviera-PRO
Riviera-PRO™ addresses verification needs of engineers crafting tomorrow’s cutting-edge FPGA and SoC devices. Riviera-PRO enables the ultimate testbench productivity, reusability, and automation by combining the high-performance simulation engine, advanced debugging capabilities at different levels of abstraction, and support for the latest Language and Verification Library Standards.
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ATSC 3.0 Broadcast Stream Verification
StreamScope XM Verifier
The Windows®-based Verifier web app receives, tests, and records ATSC 3.0 broadcast streams from RF, Ethernet, and file inputs. With Verifier, you can monitor real-time graphs and charts of bitrates, signaling tables, RF parameters, packet errors, subframes, PLPs, and other KPIs.
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EBIRST 104-pin D-type Verification Fixture
93-022-101
The 93-022-101 104-pin D-type Verification Fixture is an accessory for the eBIRST range of USB controlled test tools capable of performing automated path resistance tests on Pickering Interfaces switching solutions. The tool simply interfaces with the switching system's connector so a test can be run using the supplied Windows-based software.
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Wireless IP Surveillance Camera
ENVIROMUX-IPCAM-W
View and control the camera from the ENVIROMUX web interface, the camera web interface, included software, or with a compatible cell phone. With the ENVIROMUX-2D/5D/16D, a triggered snapshot can be forwarded in alert e-mails. A snapshot can be triggered by any programmed event (motion detection, door open/close, glass break, smoke, liquid detection, etc.). Image sensor: 1/4" progressive scan CMOS sensor. Video Streaming: simultaneous Motion JPEG and MPEG-4. Frame rate: 30fps at 640x480 (VGA) resolution. Lens: F2.0, 4.0 mm (0.16 in). RJ45 connector. Wireless models: wireless IEEE 802.11 b/g up to 54 Mbps. Regulatory approvals: CE, FCC, RoHS.
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IP Gateway
SFT3508F/SFT3508F-10 (SFT3508F-M)
Hangzhou Softel Optic Co., Ltd.
*8 Data ports ( SFT3508F/SFT3508F-M) :First Data port: IP out over HTTP, UDP (SPTS), HLS and RTMPData CH1-7 ports: IP in over HTTP, UDP (SPTS), RTP (SPTS), RTSP and HLSIP out over HTTP, HLS and RTMP (Unicast)*10 Data ports ( SFT3508F-10) :First Data port: IP out over HTTP, UDP (SPTS), HLS and RTMPData CH1-9 ports: IP in over HTTP, UDP (SPTS), RTP (SPTS), RTSP and HLSIP out over HTTP, HLS and RTMP (Unicast)*Support TS files uploading through Web management*Support IP anti- jitter function*Support adding scrolling caption, welcome words, boot image and boot video (this function is only applicable to IP out application and the STB/Android TV must be installed SOFTEL IPTV APK)*Support downloading SOFTEL IPTV APK directly from this device *Support about 80 HD/SD programs (Bitrate:2Mbps) When HTTP/RTP/RTSP/HLS is converted into UDP (Multicast),the actual application shall prevail, and suggest maximum 80% CPU utilization*Support program playing with APK downloaded android STB and TV, maximum 150 terminals
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CPE Design Verification System
Jupiter 310
Jupiter is the industry standard for automated DOCSIS physical (PHY) layer testing. It provides the most comprehensive test coverage and accurate results on the market for DOCSIS 3.1 devices.
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IP and Port Monitoring Software
CallerIP
IP and Port monitoring. See all incoming and outgoing connections made to your computer. Including process names, remote and internal port numbers and much more. Automated alerts bring your attention to illegal connections. Automated Alerting. Set up alerts to warn you of intruders and hack attempts. CallerIP can send an email, display a warning dialog and/or append a log file. CallerIP Server. CallerIP server allows you to view all incoming and outgoing connections to your computer from any browser in the world. CallerIP plots all connecting IP locations on a world map. IP origin shown on world map. All connecting IP address locations are shown on a world map.
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End Point IP Core
PCIe
The highly configurable PCIe End point IP core supports x1, x2, and x4 lane with a selection of 32/64-bit data path. Depending on design requirements, a maximum of 8 VCs and 8 TCs are supported. The IP core consists of many useful features that can be included to enhance system performance and to address special design needs in different applications. The data link layer allows the configuration of infinite credits to boost the flow control efficiency. By-pass mode, cut-through mode, and store-and-forward mode are other optional items. The transport layer features include configurable ECRC generation and checking, support for up to 64 configurable outstanding non-posted requests, and configurable payload size from 128 to 4 Kbytes
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Vision Standard IP Cores
S2I’s Vision Standard IP Cores solutions are delivered as a working reference design along with FPGA IP cores. This minimizes development time and allows for top-notch performance at a small footprint, while leaving enough flexibility to customize the design. Sensor to Image cores are compact and leave enough space in the FPGA for your application.
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FPGA Toolkits & IP
Curtiss-Wright Defense Solutions
Our tools and source code for use with our Xilinx Virtex and Kintex-based FPGA products include- FusionXF simplifies the development of FPGA-based application code by allowing developers to concentrate on their application without needing to worry about system integration of the hardware and operating system interface. The DDC family of IP cores supports decimation from 2 to 64 in complex mode and 2 to 32 in real mode
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Functional Verification
The Mentor Graphics Scalable Verification" is the most comprehensive EDA solution for functional verification, merging standards support, tools and a "design for verification" methodology to minimize verification cycles and costly design respins.
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Verification And Diagnostic Tools
Y1131A
Provides module-specific tests to troubleshoot relay failures and predict maintenance requirements.
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IP Parallel HV
High Voltage [up to 30V] IP Compatible card with 48 programmable IO. 40 mA sink. Open collector interface. Interrupt generator on each input channel. Filtered or direct input.
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IP Address Manager
IP address management software designed to save time and prevent costly errors
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Matrix Code Verification Systems
REA VeriCube
The REA VeriCube is a state-of-the-art matrix and barcode verification device which can be used across all industry sectors. Whether lying, standing or from top to bottom, virtually any test sample can be measured contact-free in the optimum measuring position. The measurement of optical codes in compliance with defined angles, distances and lighting allows accurate and reproducible measurement results and quality evaluations.
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I/P Electro-Pneumatic Signal Converters
TEIP11 / TEIP11-PS
Electro-pneumatic signal converters are the link between the control rooms and pneumatic actuators. I/P converters are available with and without booster stage.
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Pegasus Verification System
The Cadence® Pegasus® Verification System is a cloud-ready physical verification signoff solution, which enables engineers to deliver advanced-node integrated circuits (ICs) to market faster. The groundbreaking technology delivers up to 10X improved performance on DRC runs and reduces turnaround time from days to hours.
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VXI IP Carrier Module
DP-VXI-5124
The Data Patterns DP-VXI-5124 is a VXI 'C' size Carrier Board, which occupies a single slot in the VXI system. The module is a register based device with A16/A24/A32 address space and has interrupter capability. The carrier board's VXI bus interface is used to program and monitor the carrier board registers for configuration and control of the board. The VXI bus interface is also used to communicate with and control the external devices that are connected to an IP modules field I/O signals.
