ATPG
Automatic Test Program Generation or Automatic Test Pattern Generation
-
product
ATPG with Embedded Compression
TestKompress
TestKompress is an automatic test pattern generation (ATPG) tool that provides the highest quality scan test with the absolute lowest test cost. TestKompress has an industry-proven ATPG engine that applies effective fault models to your entire logic design. Manufacturing test costs are held in check by an award-winning test pattern compression technique called Embedded Deterministic Test (EDT).
-
product
VS Tool Suite for Virtual Scan Synthesis and ATPG
VirtualScan
VirtualScan is SynTest's solution to combat increase in test data volume and test cycle volume. With VirtualScan (VS) an extremely large number of short scan chains within the SOC can be virtually accessed from outside the chip with a limited number of pins assigned as scan pins.
-
product
JTAG Test Software
JTAG Technologies software has been subject to a program of continuous development for over 20 years. The first products, launched in 1991 formed the start of our 'Classic' range of software and featured the first automatic boundary-scan test program generator (ATPG) for PCB interconnects plus associated test execution and diagnostics software. In 2006 JTAG Technologies launched it's new flagship tools platform JTAG ProVision.
-
product
Direct conversion from cycle driven simulation data
Test program generator
Direct conversion from cycle driven simulation data (ATPG scan patterns) (WGL/TDL/STIL) to tester. TDL/WGL/STIL to tester conversion Supports STIL ext 0,1,2 constructs Easy to use and cost effective conversion solution Optimize tester resources usage Supports advanced tester features (Such as Xmode, Multi-port etc’) Compress and minimize vectors count Allow direct tester binary patterns creation
-
product
A Comprehensive Package of DFT Tools
DFT- PRO Plus
DFT-PRO Plus offers an integrated DFT solution covering scan synthesis and ATPG, memory Built-In Self-Test (BIST) synthesis and boundaryscan (BSD) synthesis. The corresponding tools generate RTL blocks that fit seamlessly into an existing synthesis flow
-
product
DFT Validation And Silicon Debug Platform
NEBULA Silicon Debugger
NEBULA provides advanced features for performing early validation of DFT infrastructure and ATPG patterns in first silicon. The NEBULA solution directly imports test pattern formats and DFT information from leading EDA vendor tools, such as Synopsys' TetraMAX and Cadence's Encounter Test.
-
product
Testability Analysis
TurboCheck
TurboScan is an advanced full-scan and partial-scan test suite. It includes a Scan Synthesizer and an Automatic Test Pattern Generator (ATPG). TurboScan automatically repairs testability violations to make your design highly testable.
