JEDEC
semiconductor test methods and standards setting organization, Joint Electron Device Engineering Council.
See Also: UFS
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Product
IP Solution
eMMC 5.1
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Demand for mobile content capacity and bandwidth for video, pictures and music is ever increasing. To address this demand in the next generation of smartphones, tablets, and portable devices, the eMMC 5.1 Specification from JEDEC, improves the current HS400 speeds operating at 3.2Gbps, with "command queuing" making the data transfers highly efficient by offloading the software overhead into the controller. eMMC 5.1 further improves the reliability of operation by utilizing an "enhanced strobe" at the PHY layer. The eMMC5.1 is backward compatible with the existing eMMC 4.51 and eMMC 5.0 Devices.
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Product
ESD, Latch-up testing / design service
ESDdoctor
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ESDdoctor consulting service can identify, diagnose, and solve any ESD/EOS problem quickly and definitively, at a surprisingly low entry cost. You can choose testing and diagnosis only, or add ESD design services to the consulting package. ESD, Latch-up testing: HBM (ANSI/ESDA and JEDEC) on packaged dies. MM (ANSI/ESDA and JEDEC) on packaged dies. Latch-up JEDEC on packaged dies TLP on packaged and bare dies.VF-TLP on bare dies.
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Product
Semiconductor Package Wind Tunnel
WT-100
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Thermal Engineering Associates, Inc.
The WT-100 Forced Convection (Moving Air) Wind Tunnel is designed in accordance with the EIA/JEDEC JESD51-6 standard for thermal characterization of semiconductor packages and devices. The vertical design minimizes laboratory floor space requiements. Air is drawn in at the bottom and exhausts at the top. The test section is large enough to accommodate the largest JEDEC and SEMI thermal test boards. Air velocity can be adjusted over the range of 0.5 to 5 m/s; air velocity is monitored with an included hot-wire anemometer connected to a digital display. A Type-T thermocouple is mounted in the test section for monitoring the moving air temperature.
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Product
Detective Logic Analyzer
LPDDR3
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Provides logic analyzer like deep transaction Listing and Waveform captureCan store up to 1G of captured States at 1600MT/sContinuous, real time analysis, not post-processingEye Detector guarantees valid data acquisitionExtensive Triggering and Storage Qualification allows precise insightProtocol Violation Detector provides hundreds of simultaneous, real time tests to JEDEC specificationsMode Register Listing providedSupports Auto-Clock rate detect and clock stoppageConnects to the target under test with Flying Lead, BGA interposers or a midbus probeIntegrated Microsoft Charts gives quick insight into large trace capturesTrigger In & Out allows the Detective to integrate with other test tools
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Product
Universal Flash Storage
UFS
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Universal Flash Storage (UFS) is a JEDEC standard for high performance mobile storage devices suitable for next generation data storage. The UFS is also adopted by MIPI as a data transfer standard designed for mobile systems. Most UFS applications require large storage capacity for data and boot code. Applications include mobile phones, tablets, DSC, PMP, MP3, and other applications requiring mass storage, boot storage, XiP or external cards. The UFS standard is a simple, but high-performance, serial interface that efficiently moves data between a host processor and mass storage devices. USF transfers follow the SCSI model, but with a subset of SCSI commands.The Arasan UFS IP family consists of Host controller IP, Device controller IP, and MPHY.
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Product
HBM Verification Tester
HBM-VT
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High Power Pulse Instruments GmbH
- HBM pulse generator verification tester according ANSI/ESDA/JEDEC JS-001 up to ±10kV- To be used in HBM test and qualification labs for regular pulse generator specification compliance test in order to fulfill lab audit and certification requirements- Fully automatic compliance test and verification of HBM pulse generators regarding ANSI/ESDA/JEDEC JS-001 normative standard at 3 different load conditions: Short Circuit, 500 Ω, and a reference diode at VBR=15 V reverse breakdown voltage, including DC test- Parameter evaluation and verification of the transient HBM current waveforms: Peak Current, Rise Time, Decay Time, Maximum Ringing Current- Optionally available upgrade for all HPPI TLP-3010C, 4010C, 8010A, 8010C, HBM-TS10-A hardware systems in combination with HBM-S1-B (6kV) pulse generators (upgrade on request)- Fully automatic test report generation (PDF)- Electrically floating (no fixed system ground): The HBM loads, current sensor output, USB control interface and the enclosure are electrically floating. There is no limiting system ground which may introduce common-mode interference induced HBM current measurement errors.- Isolated industrial full-speed USB control interface- Isolated power supply derived from USB port- Compact size 126mm x 82.5mm x 44.5mm
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Product
Flash SATA Disk /mSATA SATA 3 SLC,MLC
FSA 300 Series
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*SATA III (6.0Gb/s) interface*Capacity: SLC 1 GB to 64 GB, MLC 4 GB to 128 GB*iSMART disk health monitoring*Intelligent error recovery system*Write protection security*Anti-vibration mechanical design*Excellent data transfer speed*Zero mechanical interference*JEDEC standard MO-300B dimension
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Product
Warpage Metrology System
TableTop Shadow Moiré (TTSM)
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Measure warpage of substrates up to 300mm x 310 mm (a 300mm wafer or two JEDEC trays) with the entire measurement taking less than two seconds. Whether individual parts or a JEDEC tray of multiple parts, the TTSM provides an ultra-fast and highly accurate measurement at room temperature that is suited for tabletop use.
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Product
Thermal Test Boards
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Thermal Engineering Associates, Inc.
TEA offers a series of thermal test boards for package characterization and design comparison that conform to to the JEDEC JESD51 standards. The board family, referred to as the TTB-1000 series, consists of two different standard sizes designed to cover a wide range of package sizes. These boards, also referred to as test coupons, provide a well defined mounting environment, will withstand temperatures to 125 oC, and have lead lands terminated in eyelets to allow for hand-wired connection to the board edge contacts. The board mates with a dual 18-pin, 3.962 mm (0.156") pitch edge-card connector.
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Product
Analyzer Probes
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The following probes are available for the MA51x0 and MA41x0 series analyzers. These probes are designed for low-voltage and high-speed midbus probing or probing with an interposer. The following JEDEC memory standards are widely used by these probes: DDR5 (JESD79-5), DDR4 (JESD79-4), DDR3 (JESD79-3), LPDDR5 & LPDDR5X (JESD209-5), LPDDR4 & LPDDR4X (JESD209-4), and LPDDR3 (JESD209-3).
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Product
Climate Control Test Chamber
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ACMAS's Climate Test Chamber is ideally suited for specimen test requiring quick changes of temperature. It covers various applications from JEDEC and IEC test standards. ACMAS Thermal Cyclic Chamber is equipped with advanced technology such as specimen temperature control which allows linear specimen temperature rates of change during rapid thermal cycling or accurate temperature ramp control. This chamber is also known as Climatic Test Chamber and Climate Controlled Test Chamber.










